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Govt notifies Semicon 2.0, sets Rs 1.27 lakh crore semiconductor push in motion

The Government on Monday formally notified the Semicon 2.0 scheme, setting the stage for implementation of the Rs 1,27,500-crore programme
Govt notifies Semicon 2.0, sets Rs 1.27 lakh crore semiconductor push in motion
Govt notifies Semicon 2.0, sets Rs 1.27 lakh crore semiconductor push in motionImage for representation only
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New Delhi: The Government on Monday formally notified the Semicon 2.0 scheme, setting the stage for implementation of the Rs 1,27,500-crore programme aimed at taking India’s semiconductor ambitions beyond chip manufacturing and building a comprehensive domestic ecosystem.

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The new programme seeks to strengthen capabilities across the semiconductor value chain, including indigenous chip design and intellectual property, semiconductor equipment and materials, advanced packaging, research and development, and talent development.

The initiative comes as semiconductors assume growing strategic importance worldwide. The rapid expansion of artificial intelligence is fuelling unprecedented demand for advanced chips and memory, while concerns over supply-chain vulnerabilities and shifting geopolitical dynamics have prompted countries and global companies to expand semiconductor capacity and reduce reliance on a small number of concentrated production hubs.

The Union Cabinet had approved Semicon 2.0 on July 15, 2026. Monday’s notification lays out the framework for implementing the Rs 1,27,500-crore outlay, including the structure of incentives and eligibility requirements for different segments of the semiconductor industry.

“Now the time is ripe to move to next stage to develop semiconductor ecosystem through Semicon 2.0. The objective of the scheme is self reliance and fostering a globally competitive industry,” IT Secretary S Krishnan said at a briefing.

Support for chip design

For semiconductor chip design aimed at the commercial sector, startups as well as companies owned by Indian citizens or Overseas Citizens of India (OCI) will be eligible for support.

The nature of financial assistance will vary by applicant. Startups will receive support through grants and equity co-investment, while eligible companies will be supported through royalty financing or equity co-investment.

Higher support for new fabs

Semicon 2.0 will also provide fiscal assistance for establishing additional semiconductor fabrication facilities, or fabs.

The scheme offers fiscal support of 40 per cent for silicon fabs. Compound semiconductor fabs, as well as display fabs covering LCD, OLED and micro LED technologies and other specialised fabs, will be eligible for support equivalent to 35 percent.

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Incentives for advanced packaging

The programme also seeks to expand India’s capabilities in semiconductor assembly and packaging through support for Assembly, Testing, Marking and Packaging (ATMP) and Outsourced Semiconductor Assembly and Test (OSAT) facilities.

Under the new scheme, advanced packaging projects will receive incentives equivalent to 35 per cent of capital expenditure, while conventional packaging projects will qualify for support of 25 per cent of capital expenditure.

The packaging push is intended to strengthen capabilities across both advanced and legacy semiconductor technologies as India seeks to establish a broader semiconductor manufacturing base.

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Building on Semicon India’s first phase

Semicon 2.0 builds on the progress made under the first phase of the government’s semiconductor programme.

Under the earlier phase, the government approved 12 semiconductor projects spread across six states. Three facilities — Micron’s ATMP plant, Kaynes Semicon and CG Semi’s OSAT facility — have already commenced commercial production earlier this year.

With Semicon 2.0, the government is seeking to move from establishing individual semiconductor manufacturing facilities towards developing an end-to-end ecosystem that combines manufacturing with domestic design, intellectual property, equipment, materials, packaging, R&D and skilled talent.

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